1. Field of the Invention
The present invention refers to a method of transferring command, address and data signals from a memory device to a memory controller or vice versa. Particularly, the present invention provides a more reliable transfer of command and address signals with a lower risk of bit errors.
2. Description of the Related Art
Conventionally, command, address and data signals are transferred between memory devices and a memory controller by a number of parallel lines. In response to growing computing capacities and growing amounts of information to be stored, the clock frequency and the data rate of this transfer are increased continuously. A number of fundamental problems now call for a completely new design or architecture of memory devices, memory controllers and their communication.
According to new concepts and technologies, command, address and data signals will be transferred in frames, each frame comprising command signals and/or address signals and/or data signals. Corrupted frames or frames which are recognized as faulty are transferred a second time. However, this reduces the performance of the channel between memory controller and memory device considerably.